The invention relates to a semiconductor device having a semiconductor chip stack on a rewiring plate which bears the semiconductor chip stack on its top side and has a rewiring structure which is electrically connected to the contact areas of the semiconductor chips in the semiconductor chip stack. The invention also relates to a method for producing such a semiconductor device.
The document U.S. Pat. No. 5,973,403 discloses such a device for stacking two semiconductor chips which are intended for multichip modules (MCMs) and can be inserted into memory modules which have components fitted on one side (SIMMs, single in-line memory modules) or into memory modules which have components fitted on two sides (DIMMs, dual in-line memory modules). To this end, these memory modules have a base in the form of a printed circuit board. This printed circuit board has a rewiring structure on which contact pads for flip-chip contacts and contact pads for bonding wire connections are arranged.
In this prior art, the semiconductor chip stack is formed by a semiconductor chip having flip-chip contacts and a semiconductor chip having contact areas which can be bonded being stacked in such a manner that their rear sides rest on top of one another. In this case, the flip-chip contacts are directly connected to the rewiring structure and the stacked semiconductor chip is coupled to the rewiring structure via bonding wires, the associated contact pads for the semiconductor chips been joined together on the printed circuit board via rewiring lines.
One disadvantage of such a device resides in the fact that, after the electrical connections have been produced, the semiconductor chips in the semiconductor chip stack can only be tested together. The indication of a fault during testing thus does not provide any reliable statement as to which of the devices has caused a technical failure since the fault can no longer be unambiguously assigned. This disadvantage makes manufacturing analyses, fault frequency investigations and process optimization more difficult since, after bonding, only statements regarding the properties of the stack are possible. Unreliability in the contact-connection cannot be assigned either to an individual bonding connection or to an individual connection with a flip-chip contact.
The document U.S. Pat. No. 6,071,754 discloses a way of stacking two semiconductor chips which is similar to the document U.S. Pat. No. 6,007,752. In order to connect contact pads of the two types of semiconductor chip, the underside of the semiconductor plate is provided with a further rewiring structure in that case. In addition, provision is made of through-contacts to this rewiring structure on the underside. Nevertheless, the problem of the semiconductor chips which are connected to the rewiring structures on the top side and underside of the rewiring substrate or printed circuit board no longer being able to be tested individually is not solved.
For these and other reasons, there is a need for the present invention.